SRIO_DSP_X1.zip_DSP FPGA SRIO_fpga_fpga dsp SRIO_srio fpga_srio_

上传者: 42659252 | 上传时间: 2022-07-18 16:02:41 | 文件大小: 29.75MB | 文件类型: ZIP
xilinx 7 系列fpga与dsp srio数据传输

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style='color:#111;'> 23.62KB </span>","children":null,"spread":false},{"title":"srio_gen2_0_stub.vhdl <span style='color:#111;'> 6.95KB </span>","children":null,"spread":false},{"title":"srio_gen2_0_core.xdc <span style='color:#111;'> 505B </span>","children":null,"spread":false},{"title":"srio_gen2_0_funcsim.v <span style='color:#111;'> 6.69MB </span>","children":null,"spread":false},{"title":"srio_gen2_0.dcp <span style='color:#111;'> 2.36MB </span>","children":null,"spread":false},{"title":"srio_gen2_0.xml <span style='color:#111;'> 503.19KB </span>","children":null,"spread":false},{"title":"doc","children":[{"title":"srio_gen2_v4_0_changelog.txt <span style='color:#111;'> 4.43KB </span>","children":null,"spread":false}],"spread":false},{"title":"srio_gen2_0.veo <span style='color:#111;'> 11.87KB </span>","children":null,"spread":false},{"title":"srio_gen2_0_funcsim.vhdl <span style='color:#111;'> 8.01MB </span>","children":null,"spread":false},{"title":"srio_gen2_0_stub.v <span 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style='color:#111;'> 19.21KB </span>","children":null,"spread":false},{"title":"srio_gen2_0_gtpe2_rx_startup_fsm.v <span style='color:#111;'> 29.17KB </span>","children":null,"spread":false}],"spread":false},{"title":"srio_gen2_v4_0","children":[{"title":"hdl","children":[{"title":"srio_gen2_v4_0_rfs.vhd <span style='color:#111;'> 284.05KB </span>","children":null,"spread":false},{"title":"srio_gen2_v4_0_rfs.v <span style='color:#111;'> 2.24MB </span>","children":null,"spread":false}],"spread":false}],"spread":false}],"spread":false}],"spread":true}],"spread":true},{"title":"sim_1","children":[{"title":"imports","children":[{"title":"example_design","children":[{"title":"instruction_list.vh <span style='color:#111;'> 9.03KB </span>","children":null,"spread":false},{"title":"maintenance_list.vh <span style='color:#111;'> 33.78KB </span>","children":null,"spread":false},{"title":"srio_sim.v <span style='color:#111;'> 9.26KB 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