FPGA Verilog 串口收发+流水灯程序

[{"title":"（ 27 个子文件 28KB ） FPGA Verilog 串口收发+流水灯程序","children":[{"title":"uart_demo","children":[{"title":"uart_tx.qws <span style='color:#111;'> 48B </span>","children":null,"spread":false},{"title":"src","children":[{"title":"uart_top.v <span style='color:#111;'> 1.46KB </span>","children":null,"spread":false},{"title":"uart_state.v <span style='color:#111;'> 1.08KB </span>","children":null,"spread":false},{"title":"uart_bps.v <span style='color:#111;'> 625B </span>","children":null,"spread":false},{"title":"uart_tx.v <span style='color:#111;'> 771B </span>","children":null,"spread":false},{"title":"uart_work.v <span style='color:#111;'> 675B </span>","children":null,"spread":false},{"title":"water_led.v <span style='color:#111;'> 1.08KB </span>","children":null,"spread":false},{"title":"uart_rx_bps.v <span style='color:#111;'> 1.08KB </span>","children":null,"spread":false},{"title":"uart_rx_state.v <span style='color:#111;'> 1.77KB </span>","children":null,"spread":false},{"title":"uart_rx.v <span style='color:#111;'> 730B </span>","children":null,"spread":false}],"spread":true},{"title":"uart_top.qsf <span style='color:#111;'> 4.66KB </span>","children":null,"spread":false},{"title":"db","children":[{"title":"uart_top.sld_design_entry.sci <span style='color:#111;'> 217B </span>","children":null,"spread":false},{"title":"logic_util_heursitic.dat <span style='color:#111;'> 15.86KB </span>","children":null,"spread":false},{"title":"uart_top.db_info <span style='color:#111;'> 155B </span>","children":null,"spread":false},{"title":"uart_top.tmw_info <span style='color:#111;'> 364B </span>","children":null,"spread":false},{"title":"prev_cmp_uart_tx.qmsg <span style='color:#111;'> 49.20KB </span>","children":null,"spread":false},{"title":"uart_top.ipinfo <span style='color:#111;'> 178B </span>","children":null,"spread":false}],"spread":true},{"title":"uart_tx.qsf <span style='color:#111;'> 2.28KB </span>","children":null,"spread":false},{"title":"uart_tx.flow.rpt <span style='color:#111;'> 6.45KB </span>","children":null,"spread":false},{"title":"simulation","children":[{"title":"modelsim","children":[{"title":"uart_top.vt <span style='color:#111;'> 3.49KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"uart_top.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"uart_top.qws <span style='color:#111;'> 6.98KB </span>","children":null,"spread":false},{"title":"uart_tx.map.summary <span style='color:#111;'> 927B </span>","children":null,"spread":false},{"title":"CleanProject.bat <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"uart_top_nativelink_simulation.rpt <span style='color:#111;'> 1018B </span>","children":null,"spread":false},{"title":"output_files","children":null,"spread":false},{"title":"uart_tx.qpf <span style='color:#111;'> 1.29KB </span>","children":null,"spread":false},{"title":"uart_tx.map.rpt <span style='color:#111;'> 14.85KB </span>","children":null,"spread":false}],"spread":false}],"spread":true}]