PLX 公司的PCI、PCIe板卡驱动程序SDK6.4

The PHY Interface for the PCI Express Architecture (PIPE) is intended to enable the development of functionally equivalent PCI Express PHY's. Such PHY's can be delivered as discrete IC's or as macrocells for inclusion in ASIC designs. The specification defines a set of PHY functions which must be incorporated in a PIPE compliant PHY, and it defines a standard interface between such a PHY and a Media Access Layer (MAC) & Link Layer ASIC. It is not the intent of this specification to define the internal architecture or design of a compliant PHY chip or macrocell; The PIPE specification is defined to allow various approaches to be used. Where possible the PIPE specification references the PCI Express base specification rather than repeating its content. In case of conflicts, the PCI-Express Base Specification shall supercede the PIPE spec.

压缩包内含以下文件： 1.PCI Express ® Base Specification Revision 2.1 _2009_.pdf 2.PCI Express ® Base Specification Revision 3.0 _2009_DRAFT对比版.pdf 3.PCI Express ® Base Specification Revision 3.0 _2010_正式版.pdf 4.PCI Express ® Base Specification Revision 1.1 _2005_.pdf

NCB-PCI_Express_Base_6.0 NCB-PCI_Express_Base_5.0r1.0-2019-05-22 CB-PCI_Express_Base_4.0r1.0_September-29-2017-c PCI Express Base Specification Revision 3.1a PCI Express Base Spec 2.0 PCIe_CEM_R5_V1.0_06092021_NCB PCIe_CEM_SPEC_R4_V1_0_08072019_NCB PCIe_PHY_Test_Spec_04232019_NCB PCI_Express_Test_Spec_Electrical_Layer_3_0_rev_06062013_TS1 PCI_Express_CEM_r3.0 PCI_Express_CEM_r2.0 PCIe_PHY_Test_Spec_04232019_NCB

PCI设备厂商ID列表，包括500多面厂商ID列表及1600多项厂商设备ID列表，需要处理PCIE设备解析（BIOS／BMC解析）的编程人员一定用得到这些内容！ 也可以提供BIOS及BMC关于PCIE设备的解析代码！ 也可以联系 1992152426@qq.com索取！ 欢迎大家下载，一起来使用这个列表清单，也可以大家一起来完善这个列表清单！

软件介绍: 4G用的PCI分析计算工具，方便自己去规划，自己会用的才是自己的。使用目的：统计异频切换次数发现同频切换中的模三干扰找出测试中重叠覆盖路段寻找乒乓切换锁定越区覆盖站点使用说明：使用路测工具导出PCI原表（包含经纬度、PCI、频点信息），时间格式统一修改。删除原表“空格”部分，以“时间”为列删除重复顶内容； 数据表拷贝到“PCI分析计算工具”中，点击“PCI分析计算 ”，结果可见。

《PCI EXPRESS体系结构导读》学习pcie的很好文档，部分涉及linux操作系统

PCI简易通讯控制器驱动，安装程序支持WinNT,Win2000,WinXP等系统。健康安全无污染的绿色驱动。

该资料为PCIE M.2规范V1.2版本，PCI Express M.2 Specification Revision 3.0, Version 1.2 June 26, 2019

PCI Local Bus specification 2.3 The PCI Local Bus is a high performance 32-bit or 64-bit bus with multiplexed address and data lines. The bus is intended for use as an interconnect mechanism between highly integrated peripheral controller components, peripheral add-in cards, and processor/memory systems. The PCI Local Bus Specification, Rev. 2.3, includes the protocol, electrical, mechanical, and configuration specification for PCI Local Bus components and add-in cards. The electrical definition provides for 3.3V and 5V signaling environments.